Ring counter - Wikipedia, the free encyclopedia

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Ring counters are used in hardware logic design (e.g. ASIC and FPGA design) to create complicated finite state machines. A binary counter will require an adder circuit which is substantially more complex than a ring counter. Additionally, the worst case propagation delay on an adder circuit will be proportional to the number of bits in the code (due to the carry propagation). The propagation delay of a ring counter will be a constant regardless of the number of bits in the code. The complex combinational logic of an adder can create timing errors which may result in erratic hardware performance. Last, ring counters with Hamming distance 2(or more) allow the detection of single bit upsets that can occur in hazardous environments.

The disadvantage of ring counters is that they are lower density codes. A binary counter can represent 2^N states, where N is the number of bits in the code, whereas an Overbeck counter can represent only N states and a Johnson counter can represent only 2N states. This may be an important consideration in hardware implementations where registers are more expensive than combinational logic (e.g. FPGA).

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